1 | /* |
2 | * Academic License - for use in teaching, academic research, and meeting |
3 | * course requirements at degree granting institutions only. Not for |
4 | * government, commercial, or other organizational use. |
5 | * |
6 | * File: FCC_Sys_New.c |
7 | * |
8 | * Code generated for Simulink model 'FCC_Sys_New'. |
9 | * |
10 | * Model version : 1.85 |
11 | * Simulink Coder version : 9.3 (R2020a) 18-Nov-2019 |
12 | * C/C++ source code generated on : Fri Jul 10 14:45:34 2020 |
13 | * |
14 | * Target selection: ert.tlc |
15 | * Embedded hardware selection: Intel->x86-32 (Windows32) |
16 | * Code generation objectives: |
17 | * 1. Execution efficiency |
18 | * 2. RAM efficiency |
19 | * Validation result: Not run |
20 | */ |
21 | |
22 | #include "FCC_Sys_New.h" |
23 | |
24 | rtTimingBridge FCC_Sys_New_TimingBrdg; |
25 | |
26 | /* External inputs (root inport signals with default storage) */ |
27 | ExtU_FCC_Sys_New_T FCC_Sys_New_U; |
28 | |
29 | /* External outputs (root outports fed by signals with default storage) */ |
30 | ExtY_FCC_Sys_New_T FCC_Sys_New_Y; |
31 | |
32 | /* Real-time model */ |
33 | RT_MODEL_FCC_Sys_New_T FCC_Sys_New_M_; |
34 | RT_MODEL_FCC_Sys_New_T *const FCC_Sys_New_M = &FCC_Sys_New_M_; |
35 | |
36 | /* Model step function for TID0 */ |
37 | void FCC_Sys_New_step0(void) /* Sample time: [0.001s, 0.0s] */ |
38 | { |
39 | /* Update the flag to indicate when data transfers from |
40 | * Sample time: [0.001s, 0.0s] to Sample time: [0.01s, 0.0s] */ |
41 | FCC_Sys_New_M->Timing.RateInteraction.b_TID0_1 = |
42 | (FCC_Sys_New_M->Timing.RateInteraction.TID0_1 == 0); |
43 | (FCC_Sys_New_M->Timing.RateInteraction.TID0_1)++; |
44 | if ((FCC_Sys_New_M->Timing.RateInteraction.TID0_1) > 9) { |
45 | FCC_Sys_New_M->Timing.RateInteraction.TID0_1 = 0; |
46 | } |
47 | |
48 | /* ModelReference: '<Root>/FCC_New' incorporates: |
49 | * Inport: '<Root>/AHRS1' |
50 | * Inport: '<Root>/AHRS2' |
51 | * Inport: '<Root>/AHRS3' |
52 | * Inport: '<Root>/Act_Pos1' |
53 | * Inport: '<Root>/Act_Pos2' |
54 | * Inport: '<Root>/Act_Pos3' |
55 | * Inport: '<Root>/Pilot_phi_cmd' |
56 | * Inport: '<Root>/Pilot_r_cmd' |
57 | * Inport: '<Root>/Pilot_theta_cmd' |
58 | * Outport: '<Root>/Actuator1' |
59 | * Outport: '<Root>/Actuator2' |
60 | * Outport: '<Root>/Actuator3' |
61 | */ |
62 | FCC_NewTID0(&FCC_Sys_New_U.Act_Pos1, &FCC_Sys_New_U.Act_Pos2, |
63 | &FCC_Sys_New_U.Act_Pos3, &FCC_Sys_New_Y.Actuator1, |
64 | &FCC_Sys_New_Y.Actuator2, &FCC_Sys_New_Y.Actuator3); |
65 | } |
66 | |
67 | /* Model step function for TID1 */ |
68 | void FCC_Sys_New_step1(void) /* Sample time: [0.01s, 0.0s] */ |
69 | { |
70 | /* ModelReference: '<Root>/FCC_New' incorporates: |
71 | * Inport: '<Root>/AHRS1' |
72 | * Inport: '<Root>/AHRS2' |
73 | * Inport: '<Root>/AHRS3' |
74 | * Inport: '<Root>/Act_Pos1' |
75 | * Inport: '<Root>/Act_Pos2' |
76 | * Inport: '<Root>/Act_Pos3' |
77 | * Inport: '<Root>/Pilot_phi_cmd' |
78 | * Inport: '<Root>/Pilot_r_cmd' |
79 | * Inport: '<Root>/Pilot_theta_cmd' |
80 | * Outport: '<Root>/Actuator1' |
81 | * Outport: '<Root>/Actuator2' |
82 | * Outport: '<Root>/Actuator3' |
83 | */ |
84 | FCC_NewTID1(&FCC_Sys_New_U.Pilot_theta_cmd, &FCC_Sys_New_U.Pilot_phi_cmd, |
85 | &FCC_Sys_New_U.Pilot_r_cmd, &FCC_Sys_New_U.AHRS1, |
86 | &FCC_Sys_New_U.AHRS2, &FCC_Sys_New_U.AHRS3); |
87 | } |
88 | |
89 | /* Model initialize function */ |
90 | void FCC_Sys_New_initialize(void) |
91 | { |
92 | { |
93 | static boolean_T *rateTransitionPtrs[(2 * 2)]; |
94 | FCC_Sys_New_TimingBrdg.nTasks = 2; |
95 | FCC_Sys_New_TimingBrdg.clockTick = (NULL); |
96 | FCC_Sys_New_TimingBrdg.clockTickH = (NULL); |
97 | rateTransitionPtrs[0*2 + 1] = |
98 | &(FCC_Sys_New_M->Timing.RateInteraction.b_TID0_1); |
99 | FCC_Sys_New_TimingBrdg.rateTransition = rateTransitionPtrs; |
100 | } |
101 | |
102 | /* Model Initialize function for ModelReference Block: '<Root>/FCC_New' */ |
103 | FCC_New_initialize(&FCC_Sys_New_TimingBrdg, 0, 1); |
104 | } |
105 | |
106 | /* |
107 | * File trailer for generated code. |
108 | * |
109 | * [EOF] |
110 | */ |
111 | |