1 | /* |
2 | * Academic License - for use in teaching, academic research, and meeting |
3 | * course requirements at degree granting institutions only. Not for |
4 | * government, commercial, or other organizational use. |
5 | * |
6 | * File: FCC_New.h |
7 | * |
8 | * Code generated for Simulink model 'FCC_New'. |
9 | * |
10 | * Model version : 1.94 |
11 | * Simulink Coder version : 9.3 (R2020a) 18-Nov-2019 |
12 | * C/C++ source code generated on : Fri Jul 10 14:45:25 2020 |
13 | * |
14 | * Target selection: ert.tlc |
15 | * Embedded hardware selection: Intel->x86-32 (Windows32) |
16 | * Code generation objectives: |
17 | * 1. Execution efficiency |
18 | * 2. RAM efficiency |
19 | * Validation result: Not run |
20 | */ |
21 | |
22 | #ifndef RTW_HEADER_FCC_New_h_ |
23 | #define RTW_HEADER_FCC_New_h_ |
24 | #include "AHRS_Bus.h" |
25 | #ifndef FCC_New_COMMON_INCLUDES_ |
26 | # define FCC_New_COMMON_INCLUDES_ |
27 | #include "rtwtypes.h" |
28 | #endif /* FCC_New_COMMON_INCLUDES_ */ |
29 | |
30 | /* Shared type includes */ |
31 | #include "model_reference_types.h" |
32 | |
33 | /* Child system includes */ |
34 | #ifndef FCC_New_MDLREF_HIDE_CHILD_ |
35 | #define ActuatorControl_MDLREF_HIDE_CHILD_ |
36 | #include "ActuatorControl.h" |
37 | #endif /*FCC_New_MDLREF_HIDE_CHILD_*/ |
38 | |
39 | #ifndef FCC_New_MDLREF_HIDE_CHILD_ |
40 | #define AHRSControl_MDLREF_HIDE_CHILD_ |
41 | #include "AHRSControl.h" |
42 | #endif /*FCC_New_MDLREF_HIDE_CHILD_*/ |
43 | |
44 | /* Model Code Variants */ |
45 | #include "AHRSControl_AHRS_Control.h" |
46 | #include "Actuator_Control.h" |
47 | |
48 | /* Forward declaration for rtModel */ |
49 | typedef struct tag_RTM_FCC_New_T RT_MODEL_FCC_New_T; |
50 | |
51 | /* Block signals and states (default storage) for model 'FCC_New' */ |
52 | #ifndef FCC_New_MDLREF_HIDE_CHILD_ |
53 | |
54 | typedef struct { |
55 | real_T RateTransition1; /* '<Root>/RateTransition1' */ |
56 | real_T RateTransition2; /* '<Root>/RateTransition2' */ |
57 | real_T RateTransition3; /* '<Root>/RateTransition3' */ |
58 | real_T RateTransition1_Buffer0; /* '<Root>/RateTransition1' */ |
59 | real_T RateTransition2_Buffer0; /* '<Root>/RateTransition2' */ |
60 | real_T RateTransition3_Buffer0; /* '<Root>/RateTransition3' */ |
61 | } DW_FCC_New_f_T; |
62 | |
63 | #endif /*FCC_New_MDLREF_HIDE_CHILD_*/ |
64 | |
65 | #ifndef FCC_New_MDLREF_HIDE_CHILD_ |
66 | |
67 | /* Real-time Model Data Structure */ |
68 | struct tag_RTM_FCC_New_T { |
69 | /* |
70 | * Timing: |
71 | * The following substructure contains information regarding |
72 | * the timing information for the model. |
73 | */ |
74 | struct { |
75 | struct { |
76 | uint32_T TID0_1; |
77 | boolean_T b_TID0_1; |
78 | } RateInteraction; |
79 | } Timing; |
80 | }; |
81 | |
82 | #endif /*FCC_New_MDLREF_HIDE_CHILD_*/ |
83 | |
84 | #ifndef FCC_New_MDLREF_HIDE_CHILD_ |
85 | |
86 | typedef struct { |
87 | RT_MODEL_FCC_New_T rtm; |
88 | } MdlrefDW_FCC_New_T; |
89 | |
90 | #endif /*FCC_New_MDLREF_HIDE_CHILD_*/ |
91 | |
92 | extern int_T FCC_New_GlobalTID[2]; |
93 | extern const rtTimingBridge *FCC_New_TimingBrdg; |
94 | extern void FCC_New_Disable(void); |
95 | extern void FCC_NewTID0(const int16_T *rtu_Act_Pos1, const int16_T *rtu_Act_Pos2, |
96 | const int16_T *rtu_Act_Pos3, int16_T *rty_Actuator1, int16_T *rty_Actuator2, |
97 | int16_T *rty_Actuator3); |
98 | extern void FCC_NewTID1(const int16_T *rtu_Pilot_theta_cmd, const int16_T |
99 | *rtu_Pilot_phi_cmd, const int16_T *rtu_Pilot_r_cmd, const AHRS_Bus *rtu_AHRS1, |
100 | const AHRS_Bus *rtu_AHRS2, const AHRS_Bus *rtu_AHRS3); |
101 | |
102 | /* Model reference registration function */ |
103 | extern void FCC_New_initialize(const rtTimingBridge *timingBridge, int_T |
104 | mdlref_TID0, int_T mdlref_TID1); |
105 | |
106 | #ifndef FCC_New_MDLREF_HIDE_CHILD_ |
107 | |
108 | extern MdlrefDW_FCC_New_T FCC_New_MdlrefDW; |
109 | |
110 | #endif /*FCC_New_MDLREF_HIDE_CHILD_*/ |
111 | |
112 | #ifndef FCC_New_MDLREF_HIDE_CHILD_ |
113 | |
114 | /* Block states (default storage) */ |
115 | extern DW_FCC_New_f_T FCC_New_DW; |
116 | |
117 | #endif /*FCC_New_MDLREF_HIDE_CHILD_*/ |
118 | |
119 | /*- |
120 | * The generated code includes comments that allow you to trace directly |
121 | * back to the appropriate location in the model. The basic format |
122 | * is <system>/block_name, where system is the system number (uniquely |
123 | * assigned by Simulink) and block_name is the name of the block. |
124 | * |
125 | * Use the MATLAB hilite_system command to trace the generated code back |
126 | * to the model. For example, |
127 | * |
128 | * hilite_system('<S3>') - opens system 3 |
129 | * hilite_system('<S3>/Kp') - opens and selects block Kp which resides in S3 |
130 | * |
131 | * Here is the system hierarchy for this model |
132 | * |
133 | * '<Root>' : 'FCC_New' |
134 | * '<S1>' : 'FCC_New/ModelInfo' |
135 | */ |
136 | |
137 | /*- |
138 | * Requirements for '<Root>': FCC_New |
139 | */ |
140 | #endif /* RTW_HEADER_FCC_New_h_ */ |
141 | |
142 | /* |
143 | * File trailer for generated code. |
144 | * |
145 | * [EOF] |
146 | */ |
147 | |