1/*
2 * Academic License - for use in teaching, academic research, and meeting
3 * course requirements at degree granting institutions only. Not for
4 * government, commercial, or other organizational use.
5 *
6 * File: FCC_Sys_New.h
7 *
8 * Code generated for Simulink model 'FCC_Sys_New'.
9 *
10 * Model version : 1.85
11 * Simulink Coder version : 9.3 (R2020a) 18-Nov-2019
12 * C/C++ source code generated on : Fri Jul 10 14:45:34 2020
13 *
14 * Target selection: ert.tlc
15 * Embedded hardware selection: Intel->x86-32 (Windows32)
16 * Code generation objectives:
17 * 1. Execution efficiency
18 * 2. RAM efficiency
19 * Validation result: Not run
20 */
21
22#ifndef RTW_HEADER_FCC_Sys_New_h_
23#define RTW_HEADER_FCC_Sys_New_h_
24#include <stddef.h>
25#include "AHRS_Bus.h"
26#ifndef FCC_Sys_New_COMMON_INCLUDES_
27# define FCC_Sys_New_COMMON_INCLUDES_
28#include "rtwtypes.h"
29#endif /* FCC_Sys_New_COMMON_INCLUDES_ */
30
31/* Shared type includes */
32#include "model_reference_types.h"
33
34/* Child system includes */
35#define FCC_New_MDLREF_HIDE_CHILD_
36#include "FCC_New.h"
37
38/* Model Code Variants */
39
40/* Macros for accessing real-time model data structure */
41
42/* Forward declaration for rtModel */
43typedef struct tag_RTM_FCC_Sys_New_T RT_MODEL_FCC_Sys_New_T;
44
45/* External inputs (root inport signals with default storage) */
46typedef struct {
47 int16_T Act_Pos1; /* '<Root>/Act_Pos1' */
48 int16_T Act_Pos2; /* '<Root>/Act_Pos2' */
49 int16_T Act_Pos3; /* '<Root>/Act_Pos3' */
50 int16_T Pilot_theta_cmd; /* '<Root>/Pilot_theta_cmd' */
51 int16_T Pilot_phi_cmd; /* '<Root>/Pilot_phi_cmd' */
52 int16_T Pilot_r_cmd; /* '<Root>/Pilot_r_cmd' */
53 AHRS_Bus AHRS1; /* '<Root>/AHRS1' */
54 AHRS_Bus AHRS2; /* '<Root>/AHRS2' */
55 AHRS_Bus AHRS3; /* '<Root>/AHRS3' */
56} ExtU_FCC_Sys_New_T;
57
58/* External outputs (root outports fed by signals with default storage) */
59typedef struct {
60 int16_T Actuator1; /* '<Root>/Actuator1' */
61 int16_T Actuator2; /* '<Root>/Actuator2' */
62 int16_T Actuator3; /* '<Root>/Actuator3' */
63} ExtY_FCC_Sys_New_T;
64
65/* Real-time Model Data Structure */
66struct tag_RTM_FCC_Sys_New_T {
67 /*
68 * Timing:
69 * The following substructure contains information regarding
70 * the timing information for the model.
71 */
72 struct {
73 struct {
74 uint32_T TID0_1;
75 boolean_T b_TID0_1;
76 } RateInteraction;
77 } Timing;
78};
79
80extern rtTimingBridge FCC_Sys_New_TimingBrdg;
81
82/* External inputs (root inport signals with default storage) */
83extern ExtU_FCC_Sys_New_T FCC_Sys_New_U;
84
85/* External outputs (root outports fed by signals with default storage) */
86extern ExtY_FCC_Sys_New_T FCC_Sys_New_Y;
87
88/* Model entry point functions */
89extern void FCC_Sys_New_initialize(void);
90extern void FCC_Sys_New_step0(void);
91extern void FCC_Sys_New_step1(void);
92
93/* Real-time Model object */
94extern RT_MODEL_FCC_Sys_New_T *const FCC_Sys_New_M;
95
96/*-
97 * The generated code includes comments that allow you to trace directly
98 * back to the appropriate location in the model. The basic format
99 * is <system>/block_name, where system is the system number (uniquely
100 * assigned by Simulink) and block_name is the name of the block.
101 *
102 * Use the MATLAB hilite_system command to trace the generated code back
103 * to the model. For example,
104 *
105 * hilite_system('<S3>') - opens system 3
106 * hilite_system('<S3>/Kp') - opens and selects block Kp which resides in S3
107 *
108 * Here is the system hierarchy for this model
109 *
110 * '<Root>' : 'FCC_Sys_New'
111 */
112
113/*-
114 * Requirements for '<Root>': FCC_Sys_New
115 */
116#endif /* RTW_HEADER_FCC_Sys_New_h_ */
117
118/*
119 * File trailer for generated code.
120 *
121 * [EOF]
122 */
123